Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries (Endorsed by AENOR in January of 2003.)
Edition 2003-01-01

Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries (IEC 61523-2:2002)
Edition 2003-09-01

Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries (IEC 61523-2:2002); German version EN 61523-2:2002, text in English
Edition 2003-06

Space engineering - ASIC, FPGA and IP Core engineering; English version EN 16603-20-40:2023
Edition 2024-02

Space product assurance - ASIC and FPGA development; English version EN 16602-60-02:2014
Edition 2014-12