Search results
Search list
Results in:
EIA JESD 8-3A
Gunning Transceiver Logic (GTL) Low-Level, High Speed Interface Standard for Digital Integrated Circuits
Edition
2007-03
EIA JESD 8-4
Center-Tap-Terminated (CTT) Low-Level, High- Speed Interface Standard for Digital Integrated Circuits
Edition
1993
EIA JESD 16B
Assessment of Average Outgoing Quality Levels in Parts Per Million (PPM)
Edition
2017-11
EIA JESD 22-B111A.01
Board Level Drop Test Method of Components for Handheld Electronic Products
Edition
2024-06
EIA JESD 22-B113B
Board Level Cyclic Bend Test Method for Interconnect Reliability Characterization of SMT ICs for Handheld Electronic Products
Edition
2018-08
EIA JESD 35-A
Procedure for the Wafer-Level Testing of Thin Dielectrics
Edition
2001-04
EIA JESD 35-1
General Guidelines for Designing Test Structures for the Wafer-Level Testing of Thin Dielectrics
Edition
1995-09
EIA JESD 35-2
Test Criteria for the Wafer-Level Testing of Thin Dielectrics
Edition
1996-02
EIA JESD 203
Standard Test Loads For Dual - Supply Level Translation Devices
Edition
2005-11
EIA JESD 241
Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
Edition
2015-12