Definition of CVF857 PLL Clock Driver for Registered PC1600, PC2100, PC2700 a n d PC3200 DIMM Applications
Edition 2004-05

Transmission and Multiplexing (TM) - Generic requirements for synchronization networks - Part 6-1: Timing characteristics of primary reference clocks
Edition 1998-09-01

Private Integrated Services Network (PISN) - Inter-exchange signalling protocol - Private Integrated Network eXchange (PINX) clock synchronization [ISO/IEC 15507 (1997), modified]
Edition 1999-01-01

Household and similar electrical appliances - Safety Particular requirements for clocks(IEC 60335-2-26 Ed 4, IDT)
Edition 2006

Standard for Definition of CUA877 and CU2A877 PLL Clock Drivers for for Registered DDR2 DIMM Applications
Edition 2007-01

IEEE Standard for Precision Clock Synchronization Protocol for Networked Measurement and Control Systems - Amendment 5: MIB and YANG Modules
Edition 2024

IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems - Amendment 4: GDOI (Group Domain of Interpretation) Key Management
Edition 2023

Transmission and Multiplexing (TM) - Generic requirements for synchronization networks - Part 6-2: Timing characteristics of primary reference clocks - Implementation Conformance Statement (ICS) proforma specification
Edition 2000-06-01

IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems - Amendment 1: Precision Time Protocol (PTP) Mapping for Transport over the Optical Transport Network (OTN)
Edition 2022

Definition of the SSTE32882 Registering Clock Driver with Parity and Quad Chip Selects for DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V Applications
Edition 2022-09