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EIA JESD 82-8.01
Standard for Definition of CU877 PLL Clock Driver for Registered DDR2 DIMM Applications
Edition
2004-02
EIA JESD 82-15
Standard for Definition of CUA878 PLL Clock Driver for Registered DDR2 DIMM Applications
Edition
2005-11
EIA JESD 82
Definition of CDCV857 PLL Clock Driver for Registered DDR DIMM Applications
Edition
2000-07
EIA JESD 82-11
Standard for Definition of CU878 PLL Clock Driver for Registered DDR2 DIMM Applications
Edition
2004-09
EIA JESD 82-21
Standard for Definition of CUA845 PLL Clock Driver for Registered DDR2 DIMM Applications
Edition
2007-01
BS ISO 20794-7
Road vehicles. Clock extension peripheral interface (CXPI). Data link and physical layer conformance test plan
Edition
2020-11-04
IEEE 1588
IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems
Edition
2019
IEEE 1588a
IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems - Amendment 3: Precision Time Protocol (PTP) Enhancements for Best Master Clock Algorithm (BMCA) Mechanisms
Edition
2023
IEEE 1588g
IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems - Amendment 2: Master-Slave Optional Alternative Terminology
Edition
2022
EIA JESD 82-5
Description of a 3.3 V, Zero Delay Clock Distribution Device Compliant with JESD21-C, PC133 Registered DIMM Specification
Edition
2002-07
