DKE German Commission for Electrical, Electronic & Information Technologies of DIN and VDE
DIN EN 60191-6-12
Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guidelines for fine-pitch land grid array (FLGA) (IEC 60191-6-12:2011); German version EN 60191-6-12:2011
Mechanische Normung von Halbleiterbauelementen - Teil 6-12: Allgemeine Regeln für die Erstellung von Gehäusezeichnungen von SMD-Halbleitergehäusen - Konstruktionsleitfaden für Feinraster-Land-Grid-Array (FLGA) (IEC 60191-6-12:2011); Deutsche Fassung EN 60191-6-12:2011
Overview
The DIN EN 60191-6 standard series is based on the corresponding IEC 60191-6 series of International Standards. It defines rules for outline drawings of surface mounted semiconductor device packages of varying package and terminal designs which are used during computer-supported design and manufacturing processes. This part of DIN EN 60191 standard series contains standard outline drawings, dimensions and recommended variations for all fine pitch land grid array (FLGA) packages with terminal pitch of 0,8 mm or less. The standard replaces DIN EN 60191-6-12:2003-01, for which a transitional period until 2014-07-13 applies. The following modifications have been made with respect to DIN EN 60191-6-12:2003-01: a) the scope has been expanded so that the standard includes the square type FLGA. The title of this standard has been changed accordingly: "rectangular type" has been deleted accordingly from the title; b) ball pitch of 0,3 mm has been added; c) datum is changed from the body datum to the ball datum; d) combination lists of D, E, MD, and ME have been revised; e) complete revision of the outline drawings and dimensional tables in accordance with the new edition of IEC 60191-6; f) complete editorial revision. The responsible committee is Subcommittee UK 631.4 "Gehäuse für Halbleiterbauelemente" ("Packages for semiconductor devices") of the DKE (German Commission for Electrical, Electronic and Information Technologies) at DIN and VDE.