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DKE German Commission for Electrical, Electronic & Information Technologies of DIN and VDE
DIN EN 62149-2 ; VDE 0886-149-2:2015-03 [CURRENT] references following documents:
Document number | Edition | Title |
---|---|---|
IEC 60191-2Z | 2000-09 | Mechanical standardization of semiconductor devices - Part 2: Dimensions; Supplement 24 More |
IEC 60191-3 | 1999-10 | Mechanical standardization of semiconductor devices - Part 3: General rules for the preparation of outline drawings of integrated circuits More |
IEC 60191-4 | 2013-10 | Mechanical Standardization of Semiconductor Devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages More |
IEC 60191-5 | 1997-04 | Mechanical standardization of semiconductor devices - Part 5: Recommendations applying to integrated circuit packages using tape automated bonding (TAB) More |
IEC 60191-6 | 2009-11 | Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages More |
IEC 60191-6-1 | 2001-10 | Mechanical standardization of semiconductor devices - Part 6-1: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for gull-wing lead terminals More |
IEC 60191-6-10 | 2003-11 | Mechanical standardization of semiconductor devices - Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Dimensions of P-VSON More |
IEC 60191-6-12 | 2011-06 | Mechanical standardization of semiconductor devices - Part 6-12: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch land grid array (FLGA) More |
IEC 60191-6-16 | 2007-04 | Mechanical standardization of semiconductor devices - Part 6-16: Glossary of semiconductor tests and burn-in sockets for BGA, LGA, FBGA and FLGA More |
IEC 60191-6-17 | 2011-01 | Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLAGA) More |